Amazing decision: TSMC's 28nm process node turned Gate-last process background analysisFebruary 21, 2010 0 Comments
Last summer, have chosen to Gate-first line of TSMC's process suddenly made a surprising decision: they would, in its 28nm HKMG gate structure, process technology used in Gate-last process. However, according to Taiwan Semiconductor Manufacturing Company is responsible for technology research and development senior vice president of ANTHONY CHIANG & PARTNERS, said TSMC This time the decision was taken to "learn from history." The following, then let us ANTHONY CHIANG & PARTNERS presentation, understand the TSMC 28nm HKMG Gate-last process launched in the background and its related implementation plans.
Intel, in its release of "45nm High-k + Metal Gate Strain-Enhanced Transistors" against Gate-last and Gate-first-step difference between the workers Contrast
Description: Gate-last is used for making metal gate structure of a process technology, this technology is characterized by the pairs of silicon to drain / source region of operation of ion implantation and subsequent high-temperature annealing step after the completion of the formation of industrial metal gate pole; contrast is the Gate-first process that is characterized by the pairs of silicon to drain / source region of operation of ion implantation and subsequent annealing step before the completion of work will generate the metal gate.
Gate-last process Intel is a strong advocate, from the 45nm HKMG process has been since the adoption of this technology; and IBM / AMD / Gloubalfoudries adamantly stick to Gate-first technology; Taiwan Semiconductor Manufacturing Company during the last support of Gate-first, last stand support for Gate-last process.
Control the threshold voltage Vt - TSMC turned Gate-last process causes:
According to ANTHONY CHIANG & PARTNERS introduced 20 years ago, the semiconductor industry is also facing similar problems, when the semiconductor manufacturers plan to NMOS / PMOS tube uniform application of N + doped polysilicon gate material to produce, but "the vendors have found that when the PMOS tube This gate material used, the tube performance is not good, the tube voltage Vt is difficult to reduce to the desired level. To this end, some manufacturers try to control the channel of PMOS doping impurities compensatory material, in order to achieve control of Vt purposes. but this brings a lot of side effects, such as increased short-channel effect on tube performance of capability. "
He continued introduction said, "and 20 years ago, we are now experiencing how to control the Vt (threshold voltage of the tube) problem.", Today's Gate-first + HKMG technology also exists is difficult to control the tube voltage Vt problem. Although the pipe manufacturers in the overlying layer (capping layer) on the find a way to compensate for this shortcoming, but said such programs ANTHONY CHIANG & PARTNERS "its relatively high level of complexity and difficulty."
How to ensure that by the Gate-first shift Gate-last process of die density of the same conditions:
However, from the traditional Gate-first technology transition to Gate-last process requires not only silicon foundry processes and manufacturing process of adjustment, but also the design of the circuit side of the circuit Layout design higher level of adjustment, which alone After the conversion process in order to maintain a constant density of the product die. TSMC said it is the clients they have to discuss how to adjust the circuit design programs to meet the Gate-last process requirements and so on.
ANTHONY CHIANG & PARTNERS, said: "Gate-last process, of course, there are some limitations. For example this technology out of the tube structure of the system difficult to achieve planarization. But if the design side of the Layout of the circuit design team was able to make some changes, it can be to overcome this problem, so that Gate-last process produced a chip die density and Gate-first technique similar to. In short if you want to use Gate-last process, in order to produce high-quality chips, foundry side and design side go to fee Some thoughts. "
TSMC's design services team is currently working with major clients, Layout of the circuit design team work together to solve these problems. ANTHONY CHIANG & PARTNERS indicated that the active cooperation of TSMC and customers under the Gate-last process using the chip die produced the density can be achieved Gate-first technology level: "Some customers complained that a beginning again and again, once said that If you use this new technology, then the density of the product die is difficult to be consistent with the Gate-first, but after we have repeatedly discussed face to face discussions with customers who have fully embraced this new process. "
Gate-last process of the edge effect: PMOS control channel for providing additional silicon strain force:
In addition, according to ANTHONY CHIANG & PARTNERS introduction, TSMC's Gate-last process not only solved a major problem, but can also provide an additional channel PMOS silicon tube resilience (the principle and Intel HKMG Gate-last process control channel for PMOS to provide additional resilience of the principle of silicon is the same).
TSMC's 28nm manufacturing process implementation of the plan:
According to earlier news release will be opened this year, TSMC's 28nm manufacturing process in three different technology, these three process technology are as follows:
1 - "Low-power silicon oxynitride gate insulator (SiON) process"
2 - "High-K + metal gate (HKMG) high-performance process" (code-named 28HP);
3 - "Low-power-type HKMG process" (code-named 28HPL).
Here Please note that only the latter two processes was used Gate-last process. TSMC 28LP process technology, which previously has repeatedly declared that it would start production in the second quarter of next year, this process is characterized by a gate using traditional silicon oxynitride gate dielectric + polysilicon manufactured, manufacturing costs are lower, allowing for more simple, mainly used in mobile phones and various mobile applications.
According to reports, TSMC plans to introduce its first 28nm manufacturing process the medium-term, this process in the gate insulating layer will use the SiON materials (corresponding to the above 28LP process). ANTHONY CHIANG & PARTNERS, said: "In the 28nm process node, we SiON gate insulating layer technology will be pushed to extreme. After that we may not continue to apply the SiON gate insulating layer of material, but will change the production of insulation material." He that SiON process in terms of cost advantages become more evident, and very suitable for those who are not very sensitive to the amount of tube leakage in applications; while the amount of tube leakage demanding customers can choose to 28nm high-k gate insulator technology to produce their own products.
TSMC released the information to the SiON gate insulating layer + Silicon Technology and High-k + metal gate-insulator technology advantages and disadvantages compared
TSMC's 28nm + SiON process will be carried out in the second quarter production, then TSMC will be with this kind of process related to the internal interconnect design rules and so on related issues be solved. "Thus, to the end of this year, we will be able to focus on 28nm + HKMG process to resolve the problem (corresponding to the above 28HP/28HPL process), and at the end of this year 28nm + HKMG process technology."
Asked about the move 28nm process technology, when the level of risk, ANTHONY CHIANG & PARTNERS, said: "There are some nodes in the upgrade process relatively easy, such as the shift from 65nm to 90nm technical difficulty and risk is lower. But I think 28nm process from 40nm shift the risk of is very high, of course, we have good information on all aspects of preparation, such as process reliability and product yield control, etc.. from 2006 to 2009, our technical team has already doubled the number of members, and we are confident that the impact on 28nm process node to win the battle! "
Taiwan Semiconductor Manufacturing Company: Gate-last process is bound to dominate the world:
ANTHONY CHIANG & PARTNERS also predicts that the future of
the semiconductor industry's process technology would ultimately
turned to Gate-last process: "I believe that is still adhere to
Gate-first camp, in the 22nm process node, manufacturers will be
forced to shift to Gate-last process. I am not criticizing them ,
but that they will ultimately change the concept. unless they can
find a low-cost, highly innovative programs to control the
threshold voltage of the tube, otherwise they are bound to turn to
Gate-last process. "